Part-No.: EP103, Function: Tx, Standard: LVDS
The EP103 LVDS transmitter supports transmission between the host and the flat panel display up to SXGA+ resolutions. The transmitter converts 3×10 bits of Low Voltage TTL data and 3 control bits into 4 LVDS (Low Voltage Differential Signal) data streams. At a maximum input clock rate of 135MHz, each LVDS differential data pair speed is 945Mbps, providing a total throughput of 3.78Gbps. The transmitter can be configured to input clock rising edge or falling edge strobe through an external pin.
LVDS / 135 MHz / 3 x 10 bit / compatible to THC63LVD103 / LQFP-64
•Support 10MHz to 135MHz clock rates for HVGA to SXGA+ resolution
•Up to 3.78Gbps bandwidth
•PLL requires no external components
•Cycle-to-cycle jitter rejection
•3.3V to 1.8V Low Voltage TTL tolerant Input
•Programmable data and control strobe select
•Power down mode supported
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